C / C++ / MFC

volatile uint32_t *TEST

Vaclav_ wrote:

The values of individual terms is irrelevant

Vaclav_ wrote:

Here is something which MAY explain the issue.

https://gcc.gnu.org/onlinedocs/gcc/Volatiles.html

#if !(__STDC_VOLATILE_SEMANTICS >= 3)
#error "This compiler, as configured, cannot handle the necessary volatile semantics."
#endif

#include <stdbool.h>
#include <stdint.h>
/*--------------------------------------------------------------------------}
{    RASPBERRY PI GPIO HARDWARE REGISTERS - BCM2835.PDF Manual Section 6	}
{--------------------------------------------------------------------------*/
struct __attribute__((__packed__, aligned(4))) GPIORegisters {
	uint32_t GPFSEL[6];												// 0x00  GPFSEL0 - GPFSEL5
	uint32_t reserved1;												// 0x18  reserved
	uint32_t GPSET[2];												// 0x1C  GPSET0 - GPSET1;
	uint32_t reserved2;												// 0x24  reserved
	uint32_t GPCLR[2];												// 0x28  GPCLR0 - GPCLR1
	uint32_t reserved3;												// 0x30  reserved
	const uint32_t GPLEV[2];										// 0x34  GPLEV0 - GPLEV1   ** Read only hence const
	uint32_t reserved4;												// 0x3C  reserved
	uint32_t GPEDS[2];												// 0x40  GPEDS0 - GPEDS1 
	uint32_t reserved5;												// 0x48  reserved
	uint32_t GPREN[2];												// 0x4C  GPREN0 - GPREN1;	 
	uint32_t reserved6;												// 0x54  reserved
	uint32_t GPFEN[2];												// 0x58  GPFEN0 - GPFEN1;
	uint32_t reserved7;												// 0x60  reserved
	uint32_t GPHEN[2];												// 0x64  GPHEN0 - GPHEN1;
	uint32_t reserved8;												// 0x6c  reserved
	uint32_t GPLEN[2];												// 0x70  GPLEN0 - GPLEN1;
	uint32_t reserved9;												// 0x78  reserved
	uint32_t GPAREN[2];												// 0x7C  GPAREN0 - GPAREN1;
	uint32_t reserved10;											// 0x84  reserved
	uint32_t GPAFEN[2]; 											// 0x88  GPAFEN0 - GPAFEN1;
	uint32_t reserved11;											// 0x90  reserved
	uint32_t GPPUD; 												// 0x94  GPPUD 
	uint32_t GPPUDCLK[2]; 											// 0x98  GPPUDCLK0 - GPPUDCLK1;
};

#define RPi_IO_Base_Addr 0x20000000

#define GPIO ((volatile __attribute__((aligned(4))) struct GPIORegisters*)(uintptr_t)(RPi_IO_Base_Addr + 0x200000))

/*-[gpio_output]------------------------------------------------------------}
. Given a valid GPIO port number the output is set high(true) or Low (false)
. RETURN: true for success, false for any failure
.--------------------------------------------------------------------------*/
bool gpio_output (uint8_t gpio, bool on) 
{
	if (gpio < 54) 													// Check GPIO pin number valid, return false if invalid
	{
		uint_fast32_t regnum = gpio / 32;							// Register number
		uint_fast32_t bit = 1 << (gpio % 32);						// Create mask bit
		volatile uint32_t* p;										// Create temp pointer
		if (on) p = &GPIO->GPSET[regnum];							// On == true means set
		else p = &GPIO->GPCLR[regnum];								// On == false means clear
		*p = bit;													// Output bit	
		return true;												// Return true
	}
	return false;													// Return false
}

/*--------------------------------------------------------------------------}
;{	      ENUMERATED FSEL REGISTERS ... BCM2835.PDF MANUAL see page 92		}
;{-------------------------------------------------------------------------*/
/* In binary so any error is obvious */
typedef enum {
	GPIO_INPUT = 0b000,									// 0
	GPIO_OUTPUT = 0b001,								// 1
	GPIO_ALTFUNC5 = 0b010,								// 2
	GPIO_ALTFUNC4 = 0b011,								// 3
	GPIO_ALTFUNC0 = 0b100,								// 4
	GPIO_ALTFUNC1 = 0b101,								// 5
	GPIO_ALTFUNC2 = 0b110,								// 6
	GPIO_ALTFUNC3 = 0b111,								// 7
} GPIOMODE;

/*-[gpio_setup]-------------------------------------------------------------}
. Given a valid GPIO port number and mode sets GPIO to given mode
. RETURN: true for success, false for any failure
.--------------------------------------------------------------------------*/
bool gpio_setup (uint8_t gpio, GPIOMODE mode) 
{
	if (gpio > 54) return false;									// Check GPIO pin number valid, return false if invalid
	if (mode < 0 || mode > GPIO_ALTFUNC3) return false;				// Check requested mode is valid, return false if invalid
	uint_fast32_t bit = ((gpio % 10) * 3);							// Create bit mask
	uint32_t mem = GPIO->GPFSEL[gpio / 10];							// Read register
	mem &= ~(7 << bit);												// Clear GPIO mode bits for that port
	mem |= (mode << bit);											// Logical OR GPIO mode bits
	GPIO->GPFSEL[gpio / 10] = mem;									// Write value to register
	return true;													// Return true
}

 int main (void){
     gpio_setup(17, GPIO_OUTPUT);   // GPIO 17 to output
     gpio_output(17, true);         // GPIO 17 to a high
}

gpio_output(unsigned char, bool):
  cmp r0, #53
  bhi .L5
  mov r2, #1
  and r3, r0, #31
  cmp r1, #0
  lsl r2, r2, r3
  lsr r0, r0, #5
  ldrne r3, .L7
  ldreq r3, .L7+4
  lsl r0, r0, #2
  add r3, r0, r3
  str r2, [r3]
  mov r0, #1
  bx lr
.L5:
  mov r0, #0
  bx lr
.L7:
  .word 538968092
  .word 538968104
gpio_setup(unsigned char, GPIOMODE):
  cmp r0, #54
  cmpls r1, #7
  bls .L16
  mov r0, #0
  bx lr
.L16:
  str lr, [sp, #-4]!
  mov lr, #7
  ldr ip, .L17
  umull r2, r3, r0, ip
  lsr ip, r3, #3
  and r3, ip, #255
  lsl r3, r3, #2
  add r3, r3, #536870912
  add ip, ip, ip, lsl #2
  add r3, r3, #2097152
  sub r0, r0, ip, lsl #1
  ldr r2, [r3]
  and r0, r0, #255
  add r0, r0, r0, lsl #1
  bic r2, r2, lr, lsl r0
  orr r0, r2, r1, lsl r0
  str r0, [r3]
  ldr lr, [sp], #4
  mov r0, #1
  bx lr
.L17:
  .word -858993459
main:
  mov r1, #131072
  ldr r2, .L20
  ldr r3, [r2, #4]
  bic r3, r3, #14680064
  orr r3, r3, #2097152
  str r3, [r2, #4]
  mov r0, #0
  str r1, [r2, #28]
  bx lr
.L20:
  .word 538968064

static volatile uint32_t *gpio;
int fd ;
// Try Obtain handle to physical memory
if ((fd = open ("/dev/mem", O_RDWR | O_SYNC) ) < 0) {
    if ((fd = open ("/dev/gpiomem", O_RDWR | O_SYNC) ) < 0){    
       printf("Unable to open physical memory handle: %s\n", strerror(errno));      
       return -1;
    }
}

//map a page of memory to gpio at offset 0x3F200000 which is where GPIO goodness starts on a Pi3
gpio = (uint32_t *)mmap(0, getpagesize(), PROT_READ|PROT_WRITE, MAP_SHARED, fd, 0x3F200000);

if ((int32_t)gpio < 0){
  printf("Mmap failed: %s\n", strerror(errno));
  return -1;
}

/* Now you have gpio use and abuse it */

uint32_t BaseAddressFromDTFile (void) 
{
   uint32_t base_addr = 0;
   FILE *fp;
   if ((fp = fopen(BMC2835_RPI2_DT_FILENAME, "rb"))) {
     uint32_t base_size;
     unsigned char buf[4];
     fseek(fp, BMC2835_RPI2_DT_PERI_BASE_ADDRESS_OFFSET, SEEK_SET);
     if (fread(buf, 1, sizeof(buf), fp) == sizeof(buf))
     base_addr = (uint32_t *) (buf[0] << 24 | buf[1] << 16 | buf[2] << 8 | buf[3] << 0);
     fseek(fp, BMC2835_RPI2_DT_PERI_SIZE_OFFSET, SEEK_SET);
     if (fread(buf, 1, sizeof(buf), fp) == sizeof(buf))
         base_size = (buf[0] << 24 | buf[1] << 16 | buf[2] << 8 | buf[3] << 0);
     fclose(fp);
   }
   return (base_addr);
}

// use memory file descriptor
/* Base of the peripherals block is mapped to VM */
bcm2835_peripherals = (uint32_t*) mapmem("gpio", bcm2835_peripherals_size,
memfd, (uint32_t) bcm2835_peripherals_base);

#include <stdbool.h>
#include <fcntl.h>				//Needed for SPI port
#include <sys/ioctl.h>			//Needed for SPI port
#include <linux/spi/spidev.h>	//Needed for SPI port
#include <unistd.h>			    //Needed for SPI port

/* This function will open the SPI port (either 0 or 1) with the given parameters */
/* If it fails it will return -1 otherwise it will return handle to opened device */

int OpenSPI( int SPI_Port, int* SPI_WriteMode, int* SPI_ReadMode, int* SPI_WriteLength, int* SPI_ReadLength, int* SPI_WriteSpeed, int* SPI_ReadSpeed)
{
   int status;
   int spi_handle = -1;       // This will be our handle to the SPI

   /* OPEN A HANDLE TO THE SPI DEVICE */
   if (SPI_Port) == 0){
      spi_handle = open ("/dev/spidev0.0", O_RDWR);
   } else if (SPI_Port == 1) {
      spi_handle = open ("/dev/spidev0.1", O_RDWR)
   } else {
      printf("Invalid SPI port number specified\n");
      return -1;
   }

   if (spi_handle < 0) {
      printf("Unable to open physical memory handle: %s\n", strerror(errno));      
      return -1;
   }


   /* SET SPI WRITE MODE */
   status = ioctl(spi_handle, SPI_IOC_WR_MODE, SPI_WriteMode);
   if(status < 0) {
      printf("Could not set SPIMode (WR)...ioctl fail");
      return -1;
   }

   /* SET SPI READ MODE */
   status = ioctl(spi_handle, SPI_IOC_RD_MODE, SPI_ReadMode);
   if(status < 0) {
      printf("Could not set SPIMode (RD)...ioctl fail");
      return(-1);
   }

   /* SET SPI WRITE BITS PER WORD */
   status = ioctl(spi_handle, SPI_IOC_WR_BITS_PER_WORD, SPI_WriteLength);
   if (status < 0) {
      printf("Could not set SPI bitsPerWord (WR)...ioctl fail");
      return -1;
   }

   /* SET SPI READ BITS PER WORD LETS MAKE IT 8 */
   status = ioctl(spi_handle, SPI_IOC_RD_BITS_PER_WORD, SPI_ReadLength);
   if (status < 0) {
      printf("Could not set SPI bitsPerWord(RD)...ioctl fail");
      return -1;
   }


   /* SET SPI WRITE BITS SPEED */
   status = ioctl(spi_handle, SPI_IOC_WR_MAX_SPEED_HZ, SPI_WriteSpeed);
   if (status < 0) {
      printf("Could not set SPI speed (WR)...ioctl fail");
      return -1;
   }

   /* SET SPI READ BITS SPEED */
   status = ioctl(spi_handle, SPI_IOC_RD_MAX_SPEED_HZ, SPI_ReadSpeed);
   if (status < 0) {
      printf("Could not set SPI speed (RD)...ioctl fail");
      return -1;
   }

   /* Everytthing set successfully return the handle */
   return (spi_handle);
}

/* Okay we need to write data to the SPI lets make that procedure */
int SpiWrite (int spi_device, int SPI_WriteSpeed, int SPI_WriteLength, unsigned char *data, int length)
{
    struct spi_ioc_transfer spi[length];
    int i = 0;
    int retVal = -1;

   //one spi transfer for each byte
   for (i = 0 ; i < length ; i++)
   {
	memset(&spi[i], 0, sizeof (spi[i]));
	spi[i].tx_buf  = (unsigned long)(data + i); // transmit from "data"
	spi[i].rx_buf  = 0;
	spi[i].len     = length;
        spi[i].delay_usecs   = 0 ;
        spi[i].speed_hz      = SPI_WriteSpeed;
        spi[i].bits_per_word = SPI_WriteLength;
        spi[i].cs_change = 0;
   }
   retVal = ioctl(spi_device, SPI_IOC_MESSAGE(length), &spi);
   if (retVal < 0){
      printf("Error - Problem transmitting spi data..ioctl");
      return(-1);
   }
   return retVal;
}


/* Okay we need to read data to the SPI lets make that procedure */
int SpiRead (int spi_device, int SPI_ReadSpeed, int SPI_ReadLength, unsigned char *data, int length)
{
   struct spi_ioc_transfer spi[length];
   int i = 0;
   int retVal = -1;

   // one spi transfer for each byte
   for (i = 0 ; i < length ; i++) 
   {
      memset(&spi[i], 0, sizeof (spi[i]));
      spi[i].tx_buf = 0;
      spi[i].rx_buf = (unsigned long)(data + i) ; // receive into "data"
      spi[i].len  = length;  // Amount of data to recieve
      spi[i].delay_usecs = 0 ;
      spi[i].speed_hz = SPI_ReadSpeed;
      spi[i].bits_per_word = SPI_ReadLength;
      spi[i].cs_change = 0;
   }

   retVal = ioctl(spi_device, SPI_IOC_MESSAGE(length), &spi) ;
   if(retVal < 0) {
      printf("Error - Problem transmitting spi data..ioctl");
      return -1;
    }
   return retVal;
}

int main (void){
   static int WriteSpeed = 1000000;  // lets set write speed to 1Mhz
   static int ReadSpeed  = 1000000;  // Lets set read speed to 1Mhz
   static int WriteLength = 8;       // Lets set write length to 8 bits
   static int ReadLength  = 8;       // Lets set read length to 8 bits

//----- There are a number of SPI MODES that are available -----
//SPI_MODE_0 (0,0) 	CPOL = 0, CPHA = 0, Clock idle low, data is clocked in on rising edge, output data (change) on falling edge
//SPI_MODE_1 (0,1) 	CPOL = 0, CPHA = 1, Clock idle low, data is clocked in on falling edge, output data (change) on rising edge
//SPI_MODE_2 (1,0) 	CPOL = 1, CPHA = 0, Clock idle high, data is clocked in on falling edge, output data (change) on rising edge
//SPI_MODE_3 (1,1) 	CPOL = 1, CPHA = 1, Clock idle high, data is clocked in on rising, edge output data (change) on falling edge

   static int WriteMode = SPI_MODE_0 ;       // Lets write MODE 0
   static int ReadMode  = SPI_MODE_0;        // Lets read MODDE 0

   static int SPI_handle;                    // This is our SPI handle that will be return and we hold

    /* Lets assume we want SPI port 0 lets open it */
    SPI_handle = OpenSPI(0, &WriteMode, &ReadMode, &WriteLength, &ReadLength, &WriteSpeed, &ReadSpeed);

    /* Check it opened */
   if (SPI_handle >= 0){
        
        /* let write something A,B,C,D */
        unsigned char Data[4] = { 0x41, 0x42, 0x43, 0x44};
        SpiWrite(SPI_handle, WriteSpeed, WriteLength, &Data[0], 4);


        /* we are finished so close the handle */
        close(SPI_handle); 

   }
}

#include <stdint.h>
#define STATUS_PORT 0x3F000000;
int main (void){
    uint32_t* p = (uint32_t*) STATUS_PORT;
    do {} while (*p != 1); 
}

main:
  mov r3, #1056964608
  ldr r3, [r3]
  cmp r3, #1
  beq .L2
.L3:
  b .L3
.L2:
  mov r0, #0
  bx lr

#include <stdint.h>
#define STATUS_PORT 0x3F000000;
int main (void){
    volatile uint32_t* p = (uint32_t*) STATUS_PORT; // We Add volatile to the pointer
    do {} while (*p != 1); 
}

main:
  mov r2, #1056964608
.L2:
  ldr r3, [r2]
  cmp r3, #1
  bne .L2
  mov r0, #0
  bx lr

#include <stdint.h>
#define STATUS_PORT 0x3F000000;

struct mystruct {
	uint32_t port1;
    uint32_t port2;
};

int main(void) {
	struct mystruct* p = (struct mystruct*)STATUS_PORT;
	do {} while (p->port1 != 1);
	do {} while (p->port2 != 2);
}

main:
  mov r3, #1056964608
  ldr r2, [r3]
  cmp r2, #1
  beq .L2
.L3:
  b .L3
.L2:
  ldr r3, [r3, #4]
  cmp r3, #2
  beq .L4
.L5:
  b .L5
.L4:
  mov r0, #0
  bx lr

#include <stdint.h>
#define STATUS_PORT 0x3F000000;

struct mystruct {
	uint32_t port1;
    uint32_t port2;
};

int main(void) {
	volatile struct mystruct* p = (struct mystruct*)STATUS_PORT; // We add volatile to the pointer again
	do {} while (p->port1 != 1);
	do {} while (p->port2 != 2);
}

main:
  mov r2, #1056964608
.L2:
  ldr r3, [r2]
  cmp r3, #1
  bne .L2
  mov r2, #1056964608
.L3:
  ldr r3, [r2, #4]
  cmp r3, #2
  bne .L3
  mov r0, #0
  bx lr