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Aslan        LION (From Narnia)
gong    MEDAL

#elif defined(__IMXRT1052__) || defined(__IMXRT1062__)  // Teensy 4.x
#define TCR_MASK \
    (LPSPI_TCR_PCS(3) | LPSPI_TCR_FRAMESZ(31) | LPSPI_TCR_CONT | LPSPI_TCR_RXMSK)
    void maybeUpdateTCR(
        uint32_t requested_tcr_state) /*__attribute__((always_inline)) */ {
        if ((_spi_tcr_current & TCR_MASK) != requested_tcr_state) {
            bool dc_state_change = (_spi_tcr_current & LPSPI_TCR_PCS(3)) !=
                                   (requested_tcr_state & LPSPI_TCR_PCS(3));
            _spi_tcr_current = (_spi_tcr_current & ~TCR_MASK) | requested_tcr_state;
            // only output when Transfer queue is empty.
            if (!dc_state_change || !_dcpinmask) {
                while ((_pimxrt_spi->FSR & 0x1f))
                    ;
                _pimxrt_spi->TCR = _spi_tcr_current;  // update the TCR

            } else {
                waitTransmitComplete();
                if (requested_tcr_state & LPSPI_TCR_PCS(3))
                    DIRECT_WRITE_HIGH(_dcport, _dcpinmask);
                else
                    DIRECT_WRITE_LOW(_dcport, _dcpinmask);
                _pimxrt_spi->TCR = _spi_tcr_current &
                                   ~(LPSPI_TCR_PCS(3) |
                                     LPSPI_TCR_CONT);  // go ahead and update TCR anyway?
            }
        }
    }

    // BUGBUG:: currently assumming we only have CS_0 as valid CS
    void writecommand_cont(uint8_t c) __attribute__((always_inline)) {
        maybeUpdateTCR(_tcr_dc_assert | LPSPI_TCR_FRAMESZ(7) /*| LPSPI_TCR_CONT*/);
        _pimxrt_spi->TDR = c;
        pending_rx_count++;  //
        waitFifoNotFull();
    }
    void writedata8_cont(uint8_t c) __attribute__((always_inline)) {
        maybeUpdateTCR(_tcr_dc_not_assert | LPSPI_TCR_FRAMESZ(7) | LPSPI_TCR_CONT);
        _pimxrt_spi->TDR = c;
        pending_rx_count++;  //
        waitFifoNotFull();
    }
    void writedata16_cont(uint16_t d) __attribute__((always_inline)) {
        maybeUpdateTCR(_tcr_dc_not_assert | LPSPI_TCR_FRAMESZ(15) | LPSPI_TCR_CONT);
        _pimxrt_spi->TDR = d;
        pending_rx_count++;  //
        waitFifoNotFull();
    }